Prof. Dr. rer. nat.

Peer Johannsen

Kontaktdaten

Raum

T2.2.18

Kolloquiumzeit

Forschungssemester im WS19/20, Raum T2.2.18

Telefon

(07231) 28-6166

E-mail

peer.johannsen(at)hs-pforzheim(dot)de

2015

Hochschullehrpreis der Hochschule Pforzheim


2014

Lehrpreis der Fakultät für Technik


1998 - 2001

Forschungsstipendium der Siemens AG, München


1997

Kieler Informatik Preis


Informatik

Beitrag in Zeitschrift

JOHANNSEN, P. (2013). 8 Bit sind auch heute noch ein Byte.


Dissertation

JOHANNSEN, P. (2003). Speeding Up Hardware Verification bu Automated Data Path Scaling., Kiel, Deutschland.


Beitrag in Buch

JOHANNSEN, P., BRINKMANN, R., & WINKELMANN, K. (2004). Application of Property Checking and Underlying Techniques. In R. Drechsler (Ed.), Advanced Formal Verification (pp. 125-166). Kluwer Academic Publishers.

JOHANNSEN, P., & DRECHSLER, R. (2002). Utilizing High-Level Information for Formal Hardware Verification. In J. Soldek and J. Pejas (Ed.), Advanced Computer Systems (pp. 419-431). Kluwer Academic Publishers.


Beitrag in Tagungsband

JOHANNSEN, P. (2013). Robots, Card Tricks and Creative Problem Solving., AETMS 2013.

JOHANNSEN, P. (2013). Robotics meets Puzzle Based Learning., NAO Tech Day 2013.

JOHANNSEN, P. (2013). Robots, Card Tricks and Creative Problem Solving.

JOHANNSEN, P. (2013). Robotics meets Puzzle Based Learning.

JOHANNSEN, P. (2011). True, unless disproven, or false, unless verified? Avoiding False Negatives in Functional Verification of Digital Circuits., 45. Workshop, Multi Project Chip Group.

JOHANNSEN, P., & DRECHSLER, R. (2001). Speeding Up Verification of RTL Designs by Computing One-To-One Abstractions with Reduced Signal Widths. In VLSI 2001 Post Conference Book, Kluwer Academic Publishers (Eds.), VLSI 2001 Post Conference Book, Kluwer Academic Publishers.

JOHANNSEN, P., & DRECHSLER, R. (2001). Formal Verification on the RT-Level, Computing One-To One Design Abstractions by Signal-Width Reduction. In Proc. VLSI-SOC 2001 (Very Large Scale Integration of Systems On-Chip), 11th International Conference (Eds.), Proc. VLSI-SOC 2001 (11th International Conference on Very Large Scale Integration of Systems On-Chip, Montpellier, Frankreich).

JOHANNSEN, P., & DRECHSLER, R. (2001). Utilizing High-Level Information for Formal Hardware Verification. In Proc. ACS 2001 (Advanced Computer Systems), 8th International Conference (Eds.), Proc. ACS 2001 (Advanced Computer Systems, 8th International Conference, Mielno, Polen).

JOHANNSEN, P. (2001). BooStER: Speeding Up RTL Property Checking of Digital Designs by Word-Level Abstraction. In Proc. CAV 2001 (Computer Aided Verification), 13th International Conference (Eds.), Proc. CAV 2001 (Computer Aided Verification, 13th International Conference, Paris, Frankreich).

JOHANNSEN, P. (2001). Reducing Bitvector Satisfiability Problems to Scale Down Design Sizes for RTL Property Checking. In IEEE Proc. HLDVT 2001 (High-Level Design Validation and Test), 6th IEEE International Workshop (Eds.), IEEE Proc. HLDVT 2001 (6th IEEE International High-Level Design Validation and Test Workshop, Monterey, Kalifornien, USA).


Online Publikation

JOHANNSEN, P. (2012). Mechatronics meets Computer Science.


Fachwissenschaftliche Abhandlung/Bericht

JOHANNSEN, P., & STABER, S. (2009). Verifikation parametrisierter Schaltungsbeschreibungen., Deutschland.


Hochschulbeiträge

JOHANNSEN, P. (2016). Retro Programming - Video-Spiele, Vektor-Graphik, und Wissenschaft einmal anders ., Deutschland.

JOHANNSEN, P. (2013). 30 Jahre alter Atari 130 XE Computer veranschaulicht Informatik und Digitaltechnik., Deutschland.

JOHANNSEN, P. (2012). Heute erleben, was morgen unseren Alltag prägt., Deutschland.